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Appendix B: Sensor Tables Intel
®
Server Board S5000PAL / S5000XAL TPS
Revision 1.7
Intel order number: D31979-010
88
Sensor
Name
Sensor
Number
System
Applica-
bility
Sensor Type Event /
Reading
Type
Event Offset
Triggers
Criticality Assert /
De-assert
Readable
Value /
Offsets
Event Data Rearm Standby
System
Event
('System
Event')
0Bh All System Event
12h
Sensor
Specific
6Fh
00 – System
reconfigured
04 – PEF action
OK As – Trig Offset A X
BB +1.2V
Vtt
10h All Voltage
02h
Threshold
01h
[u,l] [c,nc] Threshold
defined
As and De Analog R, T A –
BB+1.9V
NIC Core
11h All Voltage
02h
Threshold
01h
[u,l] [c,nc] Threshold
defined
As and De Analog R, T A X
BB +1.5V
AUX
12h All Voltage
02h
Threshold
01h
[u,l] [c,nc] Threshold
defined
As and De Analog R, T A
–
BB +1.5V 13h All Voltage
02h
Threshold
01h
[u,l] [c,nc] Threshold
defined
As and De Analog R, T A
–
BB +1.8V 14h All Voltage
02h
Threshold
01h
[u,l] [c,nc] Threshold
defined
As and De Analog R, T A –
BB +3.3V 15h All Voltage
02h
Threshold
01h
[u,l] [c,nc] Threshold
defined
As and De Analog R, T A –
BB +3.3V
STB
16h All Voltage
02h
Threshold
01h
[u,l] [c,nc] Threshold
defined
As and De Analog R, T A X
BB +1.5V
ESB
17h All Voltage
02h
Threshold
01h
[u,l] [c,nc] Threshold
defined
As and De Analog R, T A X
BB +5V 18h All Voltage
02h
Threshold
01h
[u,l] [c,nc] Threshold
defined
As and De Analog R, T A –
BB +1.2V
NIC
19h All Voltage
02h
Threshold
01h
[u,l] [c,nc] Threshold
defined
As and De Analog R, T A –
BB +12V
AUX
1Ah All Voltage
02h
Threshold
01h
[u,l] [c,nc] Threshold
defined
As and De Analog R, T A –
BB 0.9V 1Bh All Voltage
02h
Threshold
01h
[u,l] [c,nc] Threshold
defined
As and De Analog R, T A –
BB Vbat 1Eh All Voltage
02h
Digital
Discrete
05h
01h – Limit
exceeded
Critical As and De – R, T A X
- S5000XAL 1
- Revision History 2
- Disclaimers 3
- Table of Contents 4
- List of Figures 7
- List of Tables 8
- 1. Introduction 11
- 2. Product Overview 12
- 2.2 Server Board Layout 13
- FC D E G HB 17
- 0.00 [0.000] 19
- 3. Functional Architecture 23
- 3.1 Intel 24
- Heatsink assembly 25
- Server board 25
- CEK spring 25
- 3.1.3.1 Memory RASUM Features 26
- 3.1.3.2 Supported Memory 26
- Y (0) 28
- Y 28
- Y (0) 28
- Y Y (0, 1) 28
- Branch 0 Branch 1 30
- 3.2 ESB-2 IO Controller 31
- 3.2.1 PCI Sub-system 32
- 3.2.2 Serial ATA Support 34
- 3.3 Video Support 35
- 3.3.1.1 Video Modes 36
- 3.3.1.3 Dual Video 36
- 3.4.1 Intel 37
- I/O Acceleration Technology 37
- 3.4.2 MAC Address Definition 37
- 3.5 Super I/O 38
- (factory default) 39
- 3.5.1.4 Wake-up Control 40
- 4. Platform Management 41
- 5.2 Power Connectors 43
- 5.3.1 Intel 44
- 5.3.2 Intel 45
- RMM NIC Connector 45
- 5.4 Riser Card Slots 46
- 5.6 Bridge Board Connector 51
- 5.7.1 VGA Connector 53
- 5.7.2 NIC Connectors 53
- 5.7.3 IDE Connector 54
- 5.7.4 Intel 54
- 5.7.5 SATA Connectors 55
- 5.7.6 Serial Port Connectors 56
- 5.7.8 USB 2.0 Connectors 57
- 5.8 Fan Headers 58
- 6. Jumper Block Settings 59
- 6.2 BIOS Select Jumper 61
- 7. Light Guided Diagnostics 63
- ID LED Status LED 64
- 7.3 DIMM Fault LEDs 66
- 7.4 Processor Fault LED 66
- Specifications 68
- 130 W 70º C 150 A 69
- 8.2.4 Grounding 71
- 8.2.5 Standby Outputs 71
- 8.2.6 Remote Sense 71
- 8.2.7 Voltage Regulation 71
- 8.2.8 Dynamic Loading 72
- 8.2.9 Capacitive Loading 72
- 8.2.10 Closed-Loop Stability 72
- 8.2.11 Common Mode Noise 72
- 8.2.12 Ripple / Noise 73
- 8.2.13 Soft Starting 73
- 8.2.14 Timing Requirements 73
- AC Input 75
- CANADA ICES-003 CLASS A 77
- CANADA NMB-003 CLASSE A 77
- 89/336/EEC 77
- 9.2.2 ICES-003 (Canada) 78
- 9.2.4 BSMI (Taiwan) 79
- 9.2.5 RRL (Korea) 79
- Compliance Regional 80
- Description 80
- Compliance Reference 80
- Marking Example 80
- 9.4 Other Markings 81
- Event Data Rearm Standby 85
- Diagnostic LEDs 99
- Back edge of baseboard 99
- Revision 1.7 101
- POST Error Beep Codes 105
- Appendix E: Supported Intel 106
- Server Chassis 106
- Glossary 109
- Revision 1.7 110
- Glossary Intel 111
- Reference Documents 112
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